1. Technical Field
The present invention relates to the field of image signal processing, and more precisely to a method of motion estimation for image sequences based upon determination of motion vectors according to image block-matching operations.
2. Discussion of Related Art
The image signal coding, in particular the interframe one, is mainly used for a transmission of the encoded signal with the smallest possible band occupancy.
The motion estimation and compensation predictive coding particularly improves the image coding efficiency by calculating in a known manner a motion vector and prediction error which are both transmitted. It can be also advantageously used for image signal filtering, to improve subjective image signal quality.
One of the methods for obtaining the motion vector uses encoding algorithms called Block Matching Algorithms (BMA) which appears to be easier to be implemented (as compared with algorithms carrying out the comparison at pixel level), both in terms of amount of calculations to be carried out and of circuitry.
The state of the art, as to the block matching algorithms, is described e.g. in the article "A fast Feature--Based Block Matching Algorithms Using Integral Projections", by J. S: Kim and R. H: Park, IEEE J. Selected Areas in Comm., vol. 10, No. 5, June 1992.
The known block matching algorithms calculate the motion vector based on a block-by-block matching: the motion vector is the information relative to the position of the block having the maximum correlation value between subblocks in temporally adjacent frames.
In this article an improved algorithm is proposed with respect to the others therein described belonging to the state of the art, still appearing to be too heavy in terms of computational amount, said improved algorithm being based upon the combination of the known "Integralprojection" and "Three-step search" techniques, wherein the search of the best motion vector consists in comparing the parameters extracted from the blocks on a spatially decimated grid and in the iteration of the comparison for the best block-matching of the preceding step on a grid with reduced decimation.
As emphasized by the authors themselves in the article, this method allows a reduction by about one half of the computations to be carried out against the other known methods. This reduction however is still not enough to assure a real circuit implementation at not very high costs.